[C#] 纯文本查看 复制代码 module serializer_10to1(
input wire i_clk_hs, // high-speed clock (5 x i_clk when using DDR)
input wire i_rst_oserdes, // reset from async reset (active high)
input wire [9:0] i_data, // input parallel data
output wire sclk_t,
output wire o_data_p, // output serial data
output wire o_data_n // output serial data
);
wire eclkd;
defparam Inst3_CLKDIVC.DIV = "5.0" ;
xsCLKDIV Inst3_CLKDIVC (
.RST(i_rst_oserdes),
.CLKI(eclkd),
.ALIGNWD(1'b0),
.CDIV1(),
.CDIVX(sclk_t)
);
xsECLKSYNC Inst2_ECLKSYNCA(
.ECLKI(i_clk_hs),
.STOP(1'b1),
.ECLKO(eclkd)
);
xsODDRSAX5 xsODDRSAX5_m0(
.Q (o_data),
.D0 (i_data[0]),
.D1 (i_data[1]),
.D2 (i_data[2]),
.D3 (i_data[3]),
.D4 (i_data[4]),
.D5 (i_data[5]),
.D6 (i_data[6]),
.D7 (i_data[7]),
.D8 (i_data[8]),
.D9 (i_data[9]),
.SCLK (sclk_t),
.ECLK (eclkd),
.RST(i_rst_oserdes)
);
xsIOBO_D datain_OUT (
.A (o_data),
.Z (o_data_p),
.ZN (o_data_n)
)/* synthesis IO_TYPE="LVDS25" */;
endmodule
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发表于 2022-3-11 18:32:55
发表于 2022-4-26 17:04:53
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